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june 2011 doc id 15428 rev 5 1/23 23 std12n65m5, STF12N65M5, sti12n65m5 stp12n65m5, stu12n65m5 n-channel 650 v, 0.39 ? , 8.5 a mdmesh? v power mosfet dpak, i 2 pak, to-220fp, to-220, ipak features worldwide best r ds(on) * area higher v dss rating and high dv/dt capability excellent switching performance easy to drive 100% avalanche tested applications switching applications description these devices are n-channel mdmesh? v power mosfets based on an innovative proprietary vertical process technology, which is combined with stmicroe lectronics? well-known powermesh? horizontal layout structure. the resulting product has extremely low on- resistance, which is unmatched among silicon- based power mosfets, making it especially suitable for applications which require superior power density and outstanding efficiency. figure 1. internal schematic diagram type v dss @ t jmax r ds(on) max i d p tot std12n65m5 STF12N65M5 sti12n65m5 stp12n65m5 stu12n65m5 710 v < 0.43 ? 8.5 a 8.5 a (1) 8.5 a 8.5 a 8.5 a 1. limited only by maximum temperature allowed. 70 w 25 w 70 w 70 w 70 w dpak ipak 3 2 1 1 3 1 2 3 to-220 1 2 3 to-220fp 1 2 3 i2pak ! - v $ ' 3 table 1. device summary order codes marking packages packaging std12n65m5 STF12N65M5 sti12n65m5 stp12n65m5 stu12n65m5 12n65m5 dpak to-220fp i2pak to-220 ipak tape and reel tu b e tu b e tu b e tu b e www.st.com
contents std/f/i/p/u12n65m5 2/23 doc id 15428 rev 5 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 std/f/i/p/u12n65m5 electrical ratings doc id 15428 rev 5 3/23 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit to-220, ipak, dpak, i2pak to-220fp v ds drain-source voltage (v gs = 0) 650 v v gs gate-source voltage 25 v i d drain current (continuous) at t c = 25 c 8.5 8.5 (1) 1. limited only by maximu m temperature allowed. a i d drain current (continuous) at t c = 100 c 5.4 5.4 (1) a i dm (2) 2. pulse width limited by safe operating area. drain current (pulsed) 34 34 (1) a p tot total dissipation at t c = 25 c 70 25 w i ar avalanche current, repetitive or not- repetitive (pulse width limited by t j max) 2.5 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) 150 mj dv/dt (3) 3. i sd 8.5 a, di/dt 400 a/s; v peak < v (br)dss , v dd = 400 v peak diode recovery voltage slope 15 v/ns v iso insulation withstand voltage (rms) from all three leads to external heat sink (t = 1 s; t c = 25 c) 2500 v t stg storage temperature - 55 to 150 c t j max. operating junction temperature 150 c table 3. thermal data symbol parameter value unit dpak ipak i2pak to-220 to-220fp r thj-case thermal resistance junction-case max 1.79 5 c/w r thj-amb thermal resistance junction- ambient max 100 62.5 c/w r thj-pcb (1) 1. when mounted on 1inch2 fr-4 board, 2 oz cu thermal resistance junction-pcb max 50 c/w t l maximum lead temperature for soldering purpose 300 c electrical characteristics std/f/i/p/u12n65m5 4/23 doc id 15428 rev 5 2 electrical characteristics (t c = 25 c unless otherwise specified) table 4. on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 1 ma, v gs = 0 650 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating, t c =125 c 1 100 a a i gss gate-body leakage current (v ds = 0) v gs = 25 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 3 4 5 v r ds(on) static drain-source on resistance v gs = 10 v, i d = 4.3 a 0.39 0.43 ? table 5. dynamic symbol parameter test conditions min. typ. max. unit c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 100 v, f = 1 mhz, v gs = 0 - 900 22 2 - pf pf pf c o(tr) (1) 1. time related is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss equivalent capacitance time related v ds = 0 to 520 v, v gs = 0 -64-pf c o(er) (2) 2. energy related is defined as a constant equivalent capacitance gi ving the same stored energy as c oss when v ds increases from 0 to 80% v dss equivalent capacitance energy related -21-pf r g intrinsic gate resistance f = 1 mhz open drain - 2.5 - ? q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 520 v, i d = 4.25 a, v gs = 10 v (see figure 20 ) - 20 4.8 8.3 - nc nc nc std/f/i/p/u12n65m5 electrical characteristics doc id 15428 rev 5 5/23 table 6. switching times symbol parameter test conditions min. typ. max unit t d (v) t r (v) t f (i) t c (off) voltage delay time voltage rise time current fall time crossing time v dd = 400 v, i d = 5 a, r g = 4.7 ?, v gs = 10 v (see figure 21 and figure 24 ) - 22.6 17.6 15.6 23.4 - ns ns ns ns table 7. source drain diode symbol parameter test conditions min. typ. max. unit i sd i sdm (1) 1. pulse width limited by safe operating area source-drain current source-drain current (pulsed) 8.5 34 a a v sd (2) 2. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage i sd = 8.5 a, v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 8.5 a, di/dt = 100 a/s v dd = 100 v (see figure 24 ) 230 2.2 19 ns c a t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 8.5 a, di/dt = 100 a/s v dd = 100 v, t j = 150 c (see figure 24 ) 280 2.7 19 ns c a electrical characteristics std/f/i/p/u12n65m5 6/23 doc id 15428 rev 5 2.1 electrical characteristics (c urves) figure 2. safe operating area for to-220 and i2pak figure 3. thermal impedance for to-220 and i2pak figure 4. safe operating area for to-220fp figure 5. thermal impedance for to-220fp figure 6. safe operating area for dpak, ipak figure 7. thermal impedance for dpak, ipak i d 10 1 0.1 0.01 0.1 1 100 v d s (v) 10 (a) oper a tion in thi s a re a i s limited b y m a x r d s (on) 10 s 100 s 1m s 10m s tj=150c tc=25c s inlge p u l s e am05572v1 ) $ 6 $ 3 6 ! / p e r a t i o n i n t h i s a r e a i s , i m i t e d b y m a x 2 $ 3 o n ? s ? s m s m s 4 j ? # 4 c ? # 3 i n l g e p u l s e ! - v ) $ 6 $ 3 6 ! / p e r a t i o n i n t h i s a r e a i s , i m i t e d b y m a x 2 $ 3 o n ? s ? s m s m s 4 j ? # 4 c ? # 3 i n l g e p u l s e ! - v std/f/i/p/u12n65m5 electrical characteristics doc id 15428 rev 5 7/23 figure 8. output characteristics figure 9. transfer characteristics figure 10. gate charge vs gate-source voltage figure 11. static drain-source on resistance figure 12. capacitance variations figure 13. output capacitance stored energy i d 6 4 2 0 0 10 v d s (v) 20 (a) 5 15 25 8 10 5v 6v 7v v g s =10v 3 0 12 14 am05575v1 i d 6 4 2 0 0 4 v g s (v) 8 (a) 2 6 10 8 10 12 v d s = 20v am05576v1 v g s 6 4 2 0 0 5 q g (nc) (v) 20 8 10 15 10 v dd =520v i d =4.25a 12 3 00 200 100 0 400 500 v d s 600 am0557 8 v1 r d s (on) 0.2 3 0.1 8 0.1 3 0.0 8 0 2 i d (a) ( ? ) 1 3 0.2 8 0. 33 0. 38 0.4 3 45 6 7 8 9 v g s = 10v am05577v1 c 1000 100 10 1 0.1 10 v d s (v) (pf) 1 100 ci ss co ss cr ss am05579v1 e o ss 1.5 1.0 0.5 0 0 100 v d s (v) ( j) 400 2.0 200 3 00 2.5 3 .0 500 600 3 .5 4.0 am055 8 0v1 electrical characteristics std/f/i/p/u12n65m5 8/23 doc id 15428 rev 5 figure 14. normalized gate threshold voltage vs temperature figure 15. normalized on resistance vs temperature figure 16. source-drain diode forward characteristics figure 17. normalized b vdss @ 1 ma vs temperature figure 18. switching losses vs gate resistance (1) 1. eon including reverse re covery of a sic diode v g s (th) 1.00 0.90 0. 8 0 0.70 -50 0 t j (c) (norm) -25 1.10 75 25 50 100 am055 8 1v1 r d s (on) 1.7 1.5 0.9 0.5 -50 0 t j (c) (norm) -25 75 25 50 100 0.7 1.1 1. 3 1.9 2.1 125 i d = 4.25 a v g s = 10 v am05501v2 v s d 0 20 i s d (a) (v) 10 50 3 0 40 0 0.2 0.4 0.6 0. 8 1.0 1.2 t j =-50c t j =150c t j =25c am055 8 4v1 bv d ss -50 0 t j (c) (norm) -25 75 25 50 100 0.9 3 0.95 0.97 0.99 1.01 1.0 3 1.05 1.07 am055 83 v1 e 10 0 0 20 r g ( ? ) ( j) 10 3 0 20 3 0 40 i d =5a v dd =400v eon eoff 40 50 60 am055 8 5v1 std/f/i/p/u12n65m5 test circuits doc id 15428 rev 5 9/23 3 test circuits figure 19. switching times test circuit for resistive load figure 20. gate charge test circuit figure 21. test circuit for inductive load switching and diode recovery times figure 22. unclamped inductive load test circuit figure 23. unclamped inductive wavefor m figure 24. switching time waveform ! - v 6 ' 3 0 7 6 $ 2 ' 2 , $ 5 4 & & 6 $ $ ! - v 6 $ $ k k k k k 6 6 i 6 6 ' - ! 8 & 0 7 ) ' # / . 3 4 n & $ 5 4 6 ' ! - v ! $ $ 5 4 3 " ' ! ! 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